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ds04-27230-3ea fujitsu microelectronics data sheet copyright?2005-2008 fujitsu microelectronics limited all rights reserved 2005.11 assp for power m anegement applications (dc/dc converter for dsc/camcorder) 4-ch dc/dc converter ic for low voltage mb39a103 description the mb39a103 is a 4-channel dc/dc converter ic using pulse width modulation (pwm). this ic is ideal for up conversion, down conversion, and up/down conversion. achievement of low voltage start-up (1.7 v or more) enables operation from low voltage. 4ch is built in tssop-30p/package. each channel can be controlled, and soft-start. this is an ideal power supply for high-performance portable devices such as digital still cameras. this product is covered by us patent number 6,147,477. features ? supports for down-conversion and up/down zeta conversion (ch1) supports for up-conversion and up/down sepic conversion (ch2 to ch4) low voltage start-up (ch4): 1.7 v power supply voltage range : 2.5 v to 11 v reference voltage : 2.0 v 1 % error amplifier threshold voltage : 1.24 v 1.5 % built-in totem-pole type output for mos fet built-in soft-start circuit independent of loads high-frequency operation capability: 1.5 mhz (max) external short-circuit detection capability by ? ins terminal packages 30-pin plastic tssop 32-pad plastic bcc (fpt-30p-m04) (lcc-32p-m15)
mb39a103 2 pin assignments (continued) (top view) (fpt-30p-m04) cs2 ? ine2 fb2 dtc2 vcc ctl vref rt ct gnd cscp dtc3 fb3 ? ine3 cs3 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 cs1 ? ine1 fb1 dtc1 vcco out1 out2 out3 out4 gndo ? ins dtc4 fb4 ? ine4 cs4
mb39a103 3 (continued) (top view) (penetration diagram from surface) (lcc-32p-m15) n.c. 1 32 dtc2 31 29 28 30 27 26 vcc 2 ctl 3 vref 4 rt 5 ct 6 gnd 7 cscp 8 n.c. dtc1 vcco out1 out2 out3 out4 gndo ? ins dtc4 910 dtc3 fb2 fb3 ? ine2 ? ine3 cs2 cs3 cs1 cs4 ? ine1 ? ine4 fb1 fb4 11 12 13 14 15 16 25 24 23 22 21 20 19 18 17
mb39a103 4 pin description block pin no. symbol i/o descriptions tssop bcc ch1 27 25 dtc1 i dead time control terminal 28 26 fb1 o error amplifier output terminal 29 27 ? ine1 i error amplifier inverted input terminal 30 28 cs1 ? soft - start setting capacitor connection terminal 25 23 out1 o totem pole type output terminal ch2 432dtc2 i dead time control terminal 331 fb2 o error amplifier output terminal 230 ? ine2 i error amplifier inverted input terminal 129 cs2 ? soft - start setting capacitor connection terminal 24 22 out2 o totem pole type output terminal ch3 12 10 dtc3 i dead time control terminal 13 11 fb3 o error amplifier output terminal 14 12 ? ine3 i error amplifier inverted input terminal 15 13 cs3 ? soft - start setting capacitor connection terminal 23 21 out3 o totem pole type output terminal ch4 19 17 dtc4 i dead time control terminal 18 16 fb4 o error amplifier output terminal 17 15 ? ine4 i error amplifier inverted input terminal 16 14 cs4 ? soft - start setting capacitor connection terminal 22 20 out4 o totem pole type output terminal osc 96 ct ? triangular wave frequency setting capacitor connection terminal 85 rt ? triangular wave frequency setting resistor connection terminal control 63 ctl i power supply control terminal 11 8 cscp ? short-circuit detection circuit capacitor connection terminal 20 18 ? ins i short-circuit detection comparator inverted input terminal power 26 24 vcco ? output block power supply terminal 52 vcc ? power supply terminal 7 4 vref o reference voltage output terminal 21 19 gndo ? output block ground terminal 10 7 gnd ? ground terminal
mb39a103 5 block diagram vcco out1 out2 out3 out4 gndo vcc ctl ? ine1 cs1 fb1 dtc1 ? ine2 cs2 fb2 dtc2 ? ine3 cs3 fb3 dtc3 ? ine4 cs4 ? ins cscp fb4 dtc4 vref pch ch1 ch2 ch3 ch4 error amp1 pwm comp.1 drive1 10 a 1.24 v ? + + ? + + i o = 130 ma at vcco = 4 v nch error amp2 drive2 10 a ? + + ? + + i o = 130 ma at vcco = 4 v nch error amp3 drive3 10 a ? + + ? + + i o = 130 ma at vcco = 4 v vref nch error amp4 scp comp. drive4 scp osc uvlo2 uvlo1 rt ct vref 2.0 v vref vr1 power on/off ctl bias gnd 10 a 100 k ? 1 v 0.9 v 0.4 v ? + + ? + ? + + i o = 130 ma at vcco = 4 v 29 30 28 27 2 1 3 4 14 15 13 12 17 16 18 19 20 11 8 9 7 10 6 5 21 22 23 24 25 26 vref 1.24 v vref 1.24 v vref 1.24 v pwm comp.2 pwm comp.3 pwm comp.4 threshold voltage accuracy 1.5% l priority l priority l priority threshold voltage accuracy 1.5% threshold voltage accuracy 1.5% l priority l priority l priority l priority l priority threshold voltage accuracy 1.5% h: at scp h:uvlo release accuracy 1% error amp reference 1.24 v error amp power supply scp comp. power supply h : on (power/ on) l : off (standby mode) v th = 1.4 v short detection signal (l: at short)
mb39a103 6 absolute maximum ratings * : the packages are mounted on the epoxy board (10 cm 10 cm). warning: semiconductor devices can be permanently damaged by application of stress (voltage, current, temperature, etc.) in excess of absolute maximum ratings. do not exceed these ratings. recommended operating conditions * : see ? setting the triangular oscillation frequency?. note: pin numbers referred after this part are present on tssop-30p pkg. warning: the recommended operating conditions are required in order to ensure the normal operation of the semiconductor device. all of the device?s electrical characteristics are warranted when the device is operated within these ranges. always use semiconductor devices within their recommended operating condition ranges. operation outside these ranges may adversely affect reliability and could result in device failure. no warranty is made with respect to uses, operating conditions, or combinations not represented on the data sheet. users considering application outside the listed conditions are advised to contact their representatives beforehand. parameter symbol condition rating unit min max power supply voltage v cc vcc, vcco terminals ? 12 v output current i o out1 to out4 terminals ? 20 ma peak output current i op out1 to out4 terminals duty 5 % (t = 1/f osc duty) ? 400 ma power dissipation p d t a + 25 c (tssop-30p) ? 1390* mw t a + 25 c (bcc-32p) ? 980* mw storage temperature t stg ?? 55 + 125 c parameter symbol condition value unit min typ max start power supply voltage v cc vcc, vcco terminals (ch4) 1.7 ? 11 v power supply voltage v cc vcc, vcco terminal s (ch1 to ch4) 2.5 4 11 v reference voltage output current i ref vref terminal ? 1 ? 0ma input voltage v ine ? ine1 to ? ine4 terminals 0 ? v cc ? 0.9 v ? ins terminal 0 ? v ref v v dtc dtc1 to dtc4 terminals 0 ? v ref v control input voltage v ctl ctl terminal 0 ? 11 v output current i o out1 to out4 terminals ? 15 ?+ 15 ma oscillation frequency f osc * 100 500 1500 khz timing capacitor c t ? 39 100 560 pf timing resistor r t ? 11 24 130 k ? soft-start capacitor c s cs1 to cs4 terminals ? 0.1 1.0 f short-circuit detection capacitor c scp ?? 0.1 1.0 f reference voltage output capacitor c ref ?? 0.1 1.0 f operating ambient temperature t a ?? 30 + 25 + 85 c
mb39a103 7 electrical characteristics (vcc = vcco = 4 v, t a = + 25 c) * : standard design value (continued) parameter symbol pin no conditions value unit min typ max reference voltage block [ref] output voltage v ref 7 ? 1.98 2.00 2.02 v output voltage temperature stability ? v ref /v ref 7t a = ? 30 c to + 85 c ? 0.5* ?% input stability line 7 vcc = 2.5 v to 11 v ? 10 ?+ 10 mv load stability load 7 vref = 0 ma to ? 1 ma ? 10 ?+ 10 mv under voltage lockout protection circuit block (ch4) [uvlo1] threshold voltage v th 22 vcc = 1.4 1.5 1.65 v hysteresis width v h 22 ? 0.02 0.05 0.1 v under voltage lockout protection circuit block (ch1 to ch3) [uvlo2] threshold voltage v th 25 vcc = 1.7 1.8 1.95 v hysteresis width v h 25 ? 0.05 0.1 0.2 v short-circuit detection block [scp] threshold voltage v th 11 ? 0.65 0.70 0.75 v input source current i cscp 11 ?? 1.4 ? 1.0 ? 0.6 a reset voltage v rst 25 vref = 1.3 1.45 1.63 v triangular wave oscillator block [osc] oscillation frequency f osc 22, 23, 24, 25 ct = 100 pf, rt = 24 k ? 450 500 550 khz frequency temperature stability ? f osc / f osc 22, 23, 24, 25 t a = ? 30 c to + 85 c ? 1* ?% soft- start block [cs1 to cs4] charge current i cs 1, 15, 16, 30 cs1 to cs4 = 0 v ? 14 ? 10 ? 6 a error amplifier block [error amp1 to error amp4] threshold voltage v th 3, 13, 18, 28 fb1 to fb4 = 0.65 v 1.222 1.240 1.258 v input bias current i b 2, 14, 17, 29 ? ine1 to ? ine4 = 0 v ? 120 ? 30 ? na voltage gain a v 3, 13, 18, 28 dc ? 100* ? db frequency bandwidth bw 3, 13, 18, 28 a v = 0 db ? 1.6* ? mhz
mb39a103 8 (continued) (vcc = vcco = 4 v, t a = + 25 c) *: standard design value. parameter symbol pin no conditions value unit min typ max error amplifier block [error amp1 to error amp4] output voltage v oh 3, 13, 18, 28 ? 1.7 1.9 ? v v ol 3, 13, 18, 28 ?? 40 200 mv output source current i source 3, 13, 18, 28 fb1 to fb4 = 0.65 v ?? 2 ? 1ma output sink current i sink 3, 13, 18, 28 fb1 to fb4 = 0.65 v 150 200 ? a pwm comparator block [pwm comp.1 to pwm comp.4] threshold voltage v t0 22, 23, 24, 25 duty cycle = 0 % 0.3 0.4 ? v v t100 22, 23, 24, 25 duty cycle = dtr ? 0.9 1.0 v input current i dtc 4, 12, 19, 27 dtc1 to dtc4 = 0.4 v ? 2.0 ? 0.6 ? a output block [drive1 to drive4] output source current i source 22, 23, 24, 25 duty 5 % (t = 1/f osc duty) out1 to out4 = 0 v ?? 130 ? 75 ma output sink current i sink 22, 23, 24, 25 duty 5 % (t = 1/f osc duty) out1 to out4 = 4 v 75 130 ? ma output on resistor r oh 22, 23, 24, 25 out1 to out4 = ? 15 ma ? 18 27 ? r ol 22, 23, 24, 25 out1 to out4 = 15 ma ? 18 27 ? short-circuit detection comparator block [scp comp.] threshold voltage v th 25 ? 0.97 1.00 1.03 v input bias current i b 20 ? ins = 0 v ? 25 ? 20 ? 17 a control block [ctl] ctl input voltage v ih 6 ic active mode 1.7 ? 11 v v il 6 ic standby mode 0 ? 0.8 v input current i ctlh 6ctl = 3 v 5 30 60 a i ctll 6ctl = 0 v ?? 1 a general standby current i ccs 5ctl = 0 v ? 02 a i ccso 26 ctl = 0 v ? 02 a power supply current i cc 5ctl = 3 v ? 2.3 4.5 ma
mb39a103 9 typical characteristics (continued) t a = + 25 c ctl = 3 v 5 4 3 2 1 0 024681012 t a = + 25 c ctl = 3 v vref = 0 ma 5 4 3 2 1 0 024681012 vcc = 4 v ctl = 3 v vref = 0 ma 2.05 2.04 2.03 2.02 2.01 2.00 1.99 1.98 1.97 1.96 1.95 ? 40 ? 20 0 20 40 60 80 100 t a = + 25 c vcc = 4 v vref = 0 ma ctl = 3 v 5 4 3 2 1 0 024681012 t a = + 25 c vcc = 4 v 200 160 120 80 40 0 024681012 power supply current i cc (ma) reference voltage v ref (v) power supply current vs. power supply voltage reference voltage vs. power supply voltage power supply voltage v cc (v) power supply voltage v cc (v) reference voltage vs. ctl terminal voltage reference voltage v ref (v) operating ambient temperature t a ( c) reference voltage v ref (v) reference voltage vs. operating ambient temperature ctl terminal voltage v ctl (v) ctl terminal current i ctl ( a) ctl terminal current vs. ctl terminal voltage ctl terminal voltage v ctl (v)
mb39a103 10 (continued) t a = + 25 c vcc = 4 v ctl = 3 v ct = 39 pf 10000 1000 100 10 ct = 100 pf ct = 220 pf ct = 560 pf 1 10 100 1000 t a = + 25 c vcc = 4 v ctl = 3 v rt = 11 k ? rt = 24 k ? rt = 56 k ? rt = 130 k ? 10000 1000 100 10 10 100 1000 10000 1.2 0 200 400 600 800 1000 1200 0.3 0.2 0.7 0.9 0.4 0.6 0.8 1.0 1.1 0.5 1400 1600 t a = + 25 c vcc = 4 v ctl = 3 v rt = 24 k ? upper lower vcc = 4 v ctl = 3 v rt = 24 k ? ct = 100 pf 1.2 1.1 1 0.9 0.8 0.7 0.6 0.5 0.4 0.3 0.2 ? 40 ? 20 0 20 40 60 80 100 upper lower vcc = 4 v ctl = 3 v rt = 24 k ? ct = 100 pf 560 540 520 500 480 460 440 ? 40 ? 20 0 20 40 60 80 100 triangular wave upper and lower limit voltage vs. operating ambient temperature triangular wave upper and lower limit voltage v ct (v) operating ambient temperature t a ( c) triangular wave oscillation frequency vs. timing resistor triangular wave oscillation frequency f osc (khz) timing resistor r t (k ? ) triangular wave oscillation frequency vs. timing capacitor triangular wave oscillation frequency f osc (khz) timing capacitor c t (pf) triangular wave oscillation frequency vs. operating ambient temperature triangular wave oscillation frequency f osc (khz) operating ambient temperature t a ( c) triangular wave upper and lower limit voltage v ct (v) triangular wave upper and lower limit voltage vs. triangular wave oscillation frequency triangular wave oscillation frequency f osc (khz)
mb39a103 11 (continued) ? + + + 29 30 28 1 f in 10 k ? 2.4 k ? 2.48 v 240 k ? out 10 k ? 1.5 v 1.24 v 40 30 20 10 0 ? 10 ? 20 ? 30 ? 40 180 90 0 ? 90 ? 180 100 1 k 10 k 100 k 1 m 10 m ? a v t a = + 25 c vcc = 4 v ? ine1 cs1 1600 1400 1200 1000 800 600 400 200 0 1390 ? 40 ? 20 0 20 40 60 80 100 1000 800 600 400 200 0 980 ? 40 ? 20 0 20 40 60 80 100 error amplifier voltage gain, phase vs. frequency error amplifier voltage gain a v (db) phase (deg) frequency f (hz) power dissipation vs. operating ambient temperature (tssop-30p) power dissipation p d (mw) operating ambient temperature t a ( c) power dissipation vs. operating ambient temperature (bcc-32p) power dissipation p d (mw) operating ambient temperature t a ( c) error amp1 the same as other channels
mb39a103 12 functions 1. dc/dc converter functions (1) reference voltage block (ref) the reference voltage circuit generates a temperature-compensated reference voltage (2.0 v typ) from the voltage supplied from the vcc terminal (pin 5). the voltage is used as the reference voltage for the ic?s internal circuitry. the reference voltage can supply a load current of up to 1 ma to an external device through the vref terminal (pin 7). (2) triangular-wave oscillator block (osc) the triangular wave oscillator incorporates a timing capacitor and a timing resistor connected respectively to the ct terminal (pin 9) and rt terminal (pin 8) to generate triangular oscillation waveform amplitude of 0.4 v to 0.9 v. the triangular waveforms are input to the pwm comparator in the ic. (3) error amplifier block (error amp1 to error amp4) the error amplifier detects the dc/dc converter output voltage and outputs pwm control signals. in addition, an arbitrary loop gain can be set by connecting a feedback resistor and capacitor from the output terminal to inverted input terminal of the error amplifier, enabling stable phase compensation to the system. also, it is possible to prevent rush current at power supply start-up by connecting a soft-start capacitor with the cs1 terminal (pin 30) to cs4 terminal (pin 16) which are the non-inverted input terminal for error amp. the use of error amp for soft-start detection makes it possible for a system to operate on a fixed soft-start time that is independent of the output load on the dc/dc converter. (4) pwm comparator block (pwm comp.1 to pwm comp.4) the pwm comparator is a voltage-to-pulse width modulator that controls the output duty depending on the input/ output voltage. the output transistor turns on while the error amplifier output voltage and dtc voltage remain higher than the triangular wave voltage. (5) output block (drive1 to drive4) the output block is in the totem pole type, capable of driving an external p-channel mos fet (channel 1), and n-channel mos fet (channels 2 to 4).
mb39a103 13 2. channel control function the main or each channel is turned on and off depending on the voltage levels at the ctl terminal (pin 6), cs1 terminal (pin 30), cs2 terminal (pin 1), cs3 terminal (pin 15), and cs4 terminal (pin 16). channel on/off setting conditions *: undefined 3. protective functions (1) timer-latch short-circuit protection circuit (scp, scp comp.) the short-circuit detection comparator detects the error amp output voltage level of each channel, and if any channel output voltage of error amp reaches the short-circuit detection voltage, the timer circuits are actuated to start charging the external capacitor c scp connected to the cscp terminal (pin 11). when the capacitor (c scp ) voltage reaches about 0.7 v, the circuit is turned off the output transistor and sets the dead time to 100 %. in addition, the short-circuit detection from external input is capable by using ? ins terminal (pin 20) on short- circuit detection comparator (scp comp.) . to release the actuated protection circuit, either the power supply turn off and on again or set the ctl terminal (pin 6) to the ?l? level to lower the vref terminal (pin 7) voltage to 1.3 v (min) or less. (see ? setting time constant for timer-latch short-circuit protection circuit?.) (2) under voltage lockout protection circuit (uvlo) the transient state or a momentary decrease in supply voltage, which occurs when the power supply is turned on, may cause the ic to malfunction, resulting in breakdown or degradation of the system. to prevent such malfunctions, under voltage lockout protection circuit detects a decrease in internal reference voltage with respect to the power supply voltage, turns off the output transistor, and sets the dead time to 100% while holding the cscp terminal (pin 11) at the ?l? level. the circuit restores the output transistor to normal when the supply voltage reaches the threshold voltage of the undervoltage lockout protection circuit. protection circuit operating function table this table refers to output condition when protection circuit is operating. ctl cs1 cs2 cs3 cs4 power ch1 ch2 ch3 ch4 l ? * ? * ? * ? * off off off off off h gnd gnd gnd gnd on off off off off h high-z gnd gnd gnd on on off off off hgnd high-z gnd gnd on off on off off hgndgnd high-z gnd on off off on off h gnd gnd gnd high-z on off off off on h high-z high-z high-z high-z on on on on on operating circuit out1 out2 out3 out4 short-circuit protection circuit hll l under voltage lockout protection circuit hll l
mb39a103 14 setting the output voltage setting the triangular oscillation frequency the triangular oscillation frequency is determined by the timing capacitor (c t ) connected to the ct terminal (pin 9), and the timing resistor (r t ) connected to the rt terminal (pin 8). moreover, it shifts more greatly than the calculated values according to the constant of timing resistor (r t ) when the triangular wave oscillation frequency exceeds 1 mhz. therefore, set it referring to ?triangular wave oscillation frequency vs. timing resistor? and ?triangular wave oscillation frequency vs. timing capacitor? in ? typ- ical characteristics?. triangular oscillation frequency : f osc ? + + v o r1 r2 ? inex csx error amp 1.24 v v o (v) = (r1 + r2) 1.24 r2 x: each channel no. ? ch1 to ch4 f osc (khz) : = 1200000 c t (pf) ? r t (k ? )
mb39a103 15 setting the soft-start time to prevent rush currents when the ic is turned on, you can set a soft-start by connecting soft-start capacitors (c s1 to c s4 ) to the cs1 terminal (pin 30) to the cs4 terminal (pin 16), respectively. setting each ctlx from ?h? to ?l? switches to charge the external soft-start capacitors (c s1 to c s4 ) connected to the cs1 terminal (pin 30) to cs4 terminal (pin 16) at 10 a. the error amplifier output (fb1 to fb4) is determined by comparison between the lower one of the potentials at two non-inverted input terminals (1.24 v, cs terminal voltages) and the inverted input terminal voltage ( ? ine1 to ? ine4). the fb terminal voltage during the soft-start period (cs terminal voltage < 1.24 v) is therefore determined by comparison between the ? ine terminal and cs terminal voltages. the dc/dc converter output voltage rises in proportion to the cs terminal voltage as the soft-start capacitor connected to the cs terminal is charged. the soft-start time is obtained from the following formula: soft-start time: ts (time to output 100%) ts (s) : = 0.124 c sx ( f) ? + + v o r1 r2 ? inex vref csx c s x fbx ctlx error amp uvlo 1.24 v 10 a x: each channel no. l priority ch on/off signal l: on, h: off soft-start circuit
mb39a103 16 treatment without using cs terminal when not using the soft-start function, open the cs1 terminal (pin 30), the cs2 terminal (pin 1), the cs3 terminal (pin 15), the cs4 terminal (pin 16). 1 15 cs2 cs3 30 16 cs1 cs4 ?open? ?open? ?open? ?open? without setting soft-start time
mb39a103 17 setting time constant for timer-latch short-circuit protection circuit each channel uses the short-circuit detection comparator (scp) to always compare the error amplifier s output level to the reference voltage. while dc/dc converter load conditions are stable on all channels, the short-circuit detection comparator output remains at ?l? level, and the cscp terminal (pin 11) is held at ?l? level. if the load condition on a channel changes rapidly due to a short-circuit of the load, causing the output voltage to drop, the output of the short-circuit detection comparator on that channel goes to ?h? level. this causes the external short-circuit protection capacitor c scp connected to the cscp terminal (pin 11) to be charged at 1 a. short-circuit detection time : t scp t scp (s) : = 0.70 c scp ( f) when the capacitor c scp is charged to the threshold voltage (v th : = 0.70 v), the latch is set and the external fet is turned off (dead time is set to 100%). at this time, the latch input is closed and the cscp terminal (pin 11) is held at ?l? level. in addition, the short-circuit detection from external input is capable by using ? ins terminal (pin 20) on the short-circuit detection comparator (scp comp.). the short-circuit detection operation starts when ? ins terminal voltage is less than threshold voltage (v th : = 1 v). when the power supply is turn off and on again or vref terminal (pin 7) voltage is less than 1.3 v (min) by setting ctl terminal (pin 6) to ?l? level, the latch is released. note : when using self-power supply configuration in which the output from the ch4 dc/dc converter is connected to the vcc, note that short-circuit detection is not possible in the ch4 dc/dc converter output. ? + + ? + + + v o r1 r2 ? inex ? ins cscp ctl vref sr c scp fbx scp comp. scp uvlo latch 1 v 1.1 v : fb1 to fb3 1.0 v : fb4 ? + error amp 1.24 v 1 a vref 20 11 x: each channel no. to each channel drives timer-latch short-circuit protection circuit
mb39a103 18 treatment without using cscp terminal when not using the timer-latch short-circuit protection circuit, connect the cscp terminal (pin 11) to gnd (pin 10) with the shortest distance. 10 11 gnd cscp treatment without using cscp terminal
mb39a103 19 setting the dead time when the device is set for step-up or inverted output based on the step-up or step-up/down zeta conversion, step-up/down sepic conversion or flyback conversion, the fb terminal voltage may reach and exceed the trian- gular wave voltage due to load fluctuation. if this is the case, the output transistor is fixed to a full-on state (on duty = 100 %). to prevent this, set the maximum duty of the output transistor. to set it, set the voltage at the dtc terminal by applying a resistive voltage divider to the vref voltage as shown below. when the dtc terminal voltage is higher than the triangular wave voltage, the output transistor is turned on. the maximum duty calculation formula assuming that triangular wave amplitude : = 0.5 v and triangular wave lower voltage : = 0.4 v is given below. when the dtc terminal is not used, connect it directly to the vref terminal (pin 7) as shown below (when no dead time is set). duty (on) max : = vdt ? 0.4 v 0.5 v 100 ( % ) , vdt (v) = rb ra + rb vref 7 vref dtcx ra rb vdt x: each channel no. when using dtc to set dead time 7 vref dtcx x: each channel no. when no dead time is set
mb39a103 20 powerr supply example using ch4 for self-power supply the mb39a103 can be started with the low input voltage (v in 1.7 v) if the ch4 is used as a self-power supply. an example of supply the power using the transformer is shown below. setting shown in the ? application example? is as follows: number of windings for vcc and vcco is set to the value equivalent to v in + 2.5 v. ch1 to ch3 are operational on vcc 2.5 v; in order for the ch1 to ch3 to operate on v in 1.7 v, the number of windings should be set equivalent to v in + 0.8 v or more for vcc and vcco. d d v o 4-1 15 v v o 4-2 5 v v o 4-3 ? 7.5 v ? + + 5 21 22 2 18 16 17 ? ine4 vcco out4 v in gndo 1.24 v error amp4 vcc vref cs4 fb4 power supply example using ch4 for self-power supply
mb39a103 21 operation explanation when ctl turning on and off when ctl is turned on, internal reference voltage vr and vref generate. when vref exceeds each threshold voltage (vth1, vth2) of uvlo1 and uvlo2 (under voltage lockout protection circuit), uvlo1 and uvlo2 are released, and the operation of output drive circuit of each channel becomes possible. when ctl is off, vr and vref fall. when vref decreases and uvlo1 and uvlo2 fall below each reset voltage (vrst1, vrst2), uvlo operates and output drive circuit of each channel is forcibly done the operation stop, and makes the output off state. for the period to reach to 2.0 v by vref voltage after uvlo1 and uvlo2 are released by turning on ctl (refer to a and b in ? ? timing chart?) and the period when vref decreases from 2.0 v after turning off ctl until uvlo1 and uvlo2 operate (refer to a? and b? in ? ? timing chart?), vref which is the reference voltage does not reach 2.0 v. therefore, the bias voltage and the bias current in ic do not reach a prescribed value, and the speed of response for ic has decreased. note : for this reason, when the input sudden change and the load sudden change occur in this period, ic cannot respond immediately and the output might overshoot. therefore, impress the voltage to ctl terminal by which the vref terminal voltage never stays in the above- mentioned period. uvlo1 power on/off ctl vr 1.24 v vref bias ctl vref uvlo2 6 7 scp vcc 5 h : at scp h : uvlo release h : uvlo release erroramp reference to ch1 to ch3 output drive circuit h : possible to operate l : forcibly stop to cs1 to cs3 charge/discharge circuit h : possible to charge l : forcibly discharge to ch4 output drive circuit h : possible to operate l : forcibly stop to cs4 charge/discharge circuit h : possible to charge l : forcibly discharge ctl block equivalent circuit
mb39a103 22 vr = 1.24 v (typ) vref = 2.00 v (typ) uvlo2 a b a' b' uvlo1 vrst2 vrst1 vth2 vth1 1.5 v 0.2 v (typ) error amp reference voltage vr reference voltage vref ch4 output drive circuit control ch1 to ch3 output drive circuit control ctl terminal voltage valid uvlo1 valid uvlo2 fixed full-off fixed full-off possible to operate possible to operate uvlo2 release uvlo1 release fixed full-off fixed full-off timing chart
mb39a103 23 i/o equivalent circuit 5 10 + ? 7 1.24 v vref vcc gnd 77.3 k ? 124 k ? esd protection element esd protection element esd protection element ctl gnd 67 k ? 104 k ? 6 csx gnd vref (2.0 v) rt gnd vref (2.0 v) 8 + ? 0.7 v cscp 2 k ? gnd vref (2.0 v) 11 ct gnd vref (2.0 v) 9 ? inex csx gnd vcc vref (2.0 v) fbx 1.24 v ? ins (1 v) gnd vcc 100 k ? vref (2.0 v) 20 dtc x gnd vcc fb x ct outx gndo vcco 26 21 x: each channel no. ?? reference voltage block ?? ?? control block ?? ?? soft-start block ?? ?? short-circuit detection block ?? ?? triangular wave oscillator block (rt) ?? ?? triangular wave oscillator block (ct) ?? ?? error amplifier block (ch1 to ch4) ?? ?? short-circuit detection comparator block ?? ?? pwm comparator block (ch1 to ch4) ?? ?? output block (ch1 to ch4) ??
mb39a103 24 application example a b c d r13r14 3.3 k ? 12 k ? r15 c20 0.1 f c21 0.1 f r16 1 k ? 15 k ? r19r20 r25r26 3 k ? 22 k ? r21 c22 0.1 f c23 0.1 f r22 1 k ? r24 13 k ? r30 20 k ? 15 k ? 2.4 k ? 43 k ? r31r32 2.4 k ? 43 k ? r27 c24 0.1 f c25 0.047 f r28 2 k ? 15 k ? r33 c26 0.1 f c27 0.047 f c28 0.01 f r34 2 k ? 15 k ? r18 13 k ? r17 18 k ? v in (1.7 v to 5 v) r36 20 k ? r35 33 k ? r29 33 k ? ? ine1 cs1 fb1 dtc1 ? ine2 cs2 fb2 dtc2 ? ine3 cs3 fb3 dtc3 ? ine4 cs4 ? ins cscp fb4 dtc4 ch1 ch2 ch3 ch4 29 30 28 27 2 1 3 4 14 15 13 12 17 16 18 19 20 11 c29 100 pf r37 24 k ? rt ct 8 9 c30 0.1 f vref 7 gnd 10 q2 d4 c11 2.2 f v o 4-3 ? 7.5 v, ? 5 ma c10 2.2 f 5 t2 d2 d3 d8 d c c2 0.1 f c9 2.2 f v o 4-1 15 v, 10 ma v o 4-2 5 v, 50 ma q4 t1 d5 d6 c13 1 f c14 2.2 f v o 3-1 15 v, 10 ma v o 3-2 5 v, 50 ma c15 2.2 f c8 1 f c32 2.2 f vcc ctl 6 21 22 23 a q1 q5 d1 b c4 1 f c5 4.7 f c6 10 f v o 1 2.5 v, 250 ma d7 c16 4700 pf c3 4700 pf c18 4.7 f r12 300 ? r4 150 ? l3 10 h l4 15 h l1 22 h c19 10 f c17 1 f v o 2 3.3 v, 500 ma l2 15 h vcco 24 25 26 v c1 v b1 v c2 v b2 r23 18 k ? c1 0.1 f out1 out2 gndo out4 out3 charging current f osc accuracy 10% h : on (power on) l : off (standby mode) v th = 1.4 v
mb39a103 25 parts list note : sanyo : sanyo electric co., ltd. tdk : tdk corporation sumida : sumida electric co., ltd. ssm : susumu co., ltd. component item specification vendor parts no. q1, q2, q4 q5 pnp tr nch fet npn tr vceo = ? 12 v, ic = ? 3 a vds = 20 v, id = 1.8 a vceo = 15 v, ic = 3 a sanyo sanyo sanyo cph3106 mch3405 cph3206 d1, d7, d8 d2 to d6 diode diode vf = 0.4 v (max) , at if = 1 a vf = 0.55 v (max) , at if = 0.5 a sanyo sanyo sbs004 sb05-05cp l1 l2 l3 l4 inductor inductor inductor inductor 22 h 15 h 10 h 15 h 0.63 a, 160 m ? 0.76 a, 120 m ? 0.94 a, 67 m ? 0.76 a, 120 m ? tdk tdk tdk tdk rlf5018t-220mr63 rlf5018t-150mr76 rlf5018t-100mr94 rlf5018t-150mr76 t1, t2 transformer ?? sumida clq52 5388-t095 c1, c2, c30 c3, c16 c4, c8, c13 c5, c18 c6, c19 c9 to c11 c13, c17 c14, c15 c20 to c24, c26 c25, c27 c28 c29 ceramics condenser ceramics condenser ceramics condenser ceramics condenser ceramics condenser ceramics condenser ceramics condenser ceramics condenser ceramics condenser ceramics condenser ceramics condenser ceramics condenser 0.1 f 4700 pf 1 f 4.7 f 10 f 2.2 f 1 f 2.2 f 0.1 f 0.047 f 0.01 f 100 pf 50 v 50 v 25 v 10 v 6.3 v 16 v 25 v 16 v 50 v 50 v 50 v 50 v tdk tdk tdk tdk tdk tdk tdk tdk tdk tdk tdk tdk c1608jb1h104k c1608jb1h472k c3216jb1e105k c3216jb1a475m c3216jb0j106k c3216jb1c225k c3216jb1e105k c3216jb1c225k c1608jb1h104k c1608jb1h473k c1608jb1h103k c1608ch1h101j r4 r12 r13 r14 r15, r21, r27 r16, r22 r17 r18 r19 r20 r23 r24 r25, r31 r26 r28, r34 r29, r35 r30, r36 r32 r33 r37 resistor resistor resistor resistor resistor resistor resistor resistor resistor resistor resistor resistor resistor resistor resistor resistor resistor resistor resistor resistor 150 ? 300 ? 3.3 k ? 12 k ? 15 k ? 1 k ? 18 k ? 13 k ? 3 k ? 22 k ? 18 k ? 13 k ? 2.4 k ? 43 k ? 2 k ? 33 k ? 20 k ? 43 k ? 15 k ? 24 k ? 0.5 % 0.5 % 0.5 % 0.5 % 0.5 % 0.5 % 0.5 % 0.5 % 0.5 % 0.5 % 0.5 % 0.5 % 0.5 % 0.5 % 0.5 % 0.5 % 0.5 % 0.5 % 0.5 % 0.5 % ssm ssm ssm ssm ssm ssm ssm ssm ssm ssm ssm ssm ssm ssm ssm ssm ssm ssm ssm ssm rr0816p-151-d rr0816p-301-d rr0816p-332-d rr0816p-123-d rr0816p-153-d rr0816p-102-d rr0816p-183-d rr0816p-133-d rr0816p-302-d rr0816p-223-d rr0816p-183-d rr0816p-133-d rr0816p-242-d rr0816p-433-d rr0816p-202-d rr0816p-333-d rr0816p-203-d rr0816p-433-d rr0816p-153-d rr0816p-243-d
mb39a103 26 reference data (continued) t a = + 25 c v o 1 = 2.5 v, 250 ma v o 2 = 3.3 v, 500 ma v o 3-1 = 15 v, 10 ma v o 3-2 = 5 v, 50 ma v o 4-1 = 15 v, 10 ma v o 4-2 = 5 v, 50 ma v o 4-3 = ? 7.5 v, ? 5 ma f osc = 500 khz 100 95 90 85 80 75 70 65 60 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 100 95 90 85 80 75 70 65 60 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 ch2 ch3 ch1 ch4 t a = + 25 c total efficiency ( % ) input voltage v in (v) total efficiency vs. input voltage note: only concerned ch and ch4 (self-power supply) are on. include external sw tr operating current ch4 includes ic current consumption. each ch efficiency ( % ) input voltage v in (v) each ch efficiency vs. input voltage
mb39a103 27 (continued) t a = + 25 c v in = 3.6 v 100 95 90 85 80 75 70 65 60 0 50 100 150 200 250 300 ch2, ch3 : off t a = + 25 c v in = 3.6 v 100 95 90 85 80 75 70 65 60 0 100 200 300 400 500 ch1, ch3 : off conversion efficiency ( % ) load current l o 2 (ma) conversion efficiency vs. load current (ch2) io1 80 ma: discontinuance mode conversion efficiency ( % ) load current i o 1 (ma) conversion efficiency vs. load current (ch1) i o 1 120 ma: discontinuance mode
mb39a103 28 (continued) t a = + 25 c v in = 3.6 v vo3-1 = 10 ma vo4-1 = 10 ma vo4-3 = ? 5 ma 100 95 90 85 80 75 70 65 60 0 1020304050 ch1, ch2 : off ch1 to ch3 : off ch3 ch4 conversion efficiency ( % ) load current i o 3-2, i o 4-2 (ma) conversion efficiency vs. load current (ch3, ch4) note: ch3 and ch4 are discontinuance mode.
mb39a103 29 (continued) v b1 (v) 6 4 2 0 v c1 (v) t ( s) t a = + 25 c v in = 4 v ctl = 3 v 5 0 ? 5 012345678910 v b2 (v) 1 0 ? 1 ? 2 v c2 (v) t ( s) t a = + 25 c v in = 4 v ctl = 3 v 10 5 0 012345678910 switching wave form (ch1) switching wave form (ch2)
mb39a103 30 usage precaution ? printed circuit board ground lines should be set up with consideration for common impedance. ? take appropriate static electricity measures. containers for semiconductor materials should have anti-static protection or be made of conductive material. after mounting, printed circuit boards should be stored and shipped in conductive bags or containers. work platforms, tools, and instruments should be properly grounded. working personnel should be grounded with resistance of 250 k ? to 1 m ? between body and ground. ? do not apply negative voltages. the use of negative voltages below ?0.3 v may create parasitic transistors on lsi lines, which can cause abnormal operation. ordering information part number package remarks mb39a103pft 30-pin plastic tssop (fpt-30p-m04) MB39A103PV3 32-pad plastic bcc (lcc-32p-m15)
mb39a103 31 package dimensions (continued) 30-pin plastic tssop (fpt-30p-m04) dimensions in mm (inches) note: the values in parentheses are reference values. c 2001 fujitsu limited f30007sc-1-1 7.800.10(.307.004) 0.50(.020) 0.200.03 (.008.001) .173 ?.004 +.008 ?0.10 +0.20 4.40 6.400.10 (.252.004) 0.10(.004) 7.00(.276) 0.3865(.0152) 0.3865(.0152) 0.900.05 (.035.002) "a" 0~8 0.600.10 (.024.004) 0.25(.010) 0.100.05 (.004.002) 1.10(.043) max details of "a" part 0.1270.03 (.005.001) index 0.10(.004)
mb39a103 32 (continued) 32-pad plastic bcc (lcc-32p-m15) dimensions in mm (inches) note: the values in parentheses are reference values. c 2005 fujitsu limited c32067s-c-1-1 0.05(.002) 1 5.00 0.10(.197 .004) 5.00 0.10 (.197 .004) 0.80(.031)max 0.075 0.025 (.003 .001) (mount height) (stand off) 0.50 0.10 (.020 .004) 0.50(.020)typ 4.25(.167)typ 3.00(.118) ref 4.25(.167) typ 0.50(.020) typ (.020 .004) 0.50 0.10 3.00(.118)ref "a" "b" "c" 25 17 9 9 1 25 17 0.55 0.06 (.022 .002) 0.55 0.06 (.022 .002) c0.2(.008) (.022 .002) 0.55 0.06 (.022 .002) 0.55 0.06 0.55 0.06 (.022 .002) 0.30 0.06 (.012 .002) details of "b" part details of "c" part details of "a" part 0.14(.006) min index area
mb39a103 33 memo
mb39a103 34 memo
mb39a103 35 memo
fujitsu microelectronics limited shinjuku dai-ichi seimei bldg. 7-1, nishishinjuku 2-chome, shinjuku-ku, tokyo 163-0722, japan tel: +81-3-5322-3347 fax: +81-3-5322-3387 http://jp.fujitsu.com/fml/en/ for further information please contact: north and south america fujitsu microelectronics america, inc. 1250 e. arques avenue, m/s 333 sunnyvale, ca 94085-5401, u.s.a. tel: +1-408-737-5600 fax: +1-408-737-5999 http://www.fma.fujitsu.com/ europe fujitsu microelectronics europe gmbh pittlerstrasse 47, 63225 langen, germany tel: +49-6103-690-0 fax: +49-6103-690-122 http://emea.fujitsu.com/microelectronics/ korea fujitsu microelectronics korea ltd. 206 kosmo tower, 1002 daechi-dong, kangnam-gu,seoul 135-280 korea tel: +82-2-3484-7100 fax: +82-2-3484-7111 http://www.fmk.fujitsu.com/ asia pacific fujitsu microelectronics asia pte ltd. 151 lorong chuan, #05-08 new tech park, singapore 556741 tel: +65-6281-0770 fax: +65-6281-0220 http://www.fujitsu.com/sg/services/micro/semiconductor/ fujitsu microelectronics shanghai co., ltd. rm.3102, bund center, no.222 yan an road(e), shanghai 200002, china tel: +86-21-6335-1560 fax: +86-21-6335-1605 http://cn.fujitsu.com/fmc/ fujitsu microelectronics pacific asia ltd. 10/f., world commerce centre, 11 canton road tsimshatsui, kowloon hong kong tel: +852-2377-0226 fax: +852-2376-3269 http://cn.fujitsu.com/fmc/tw all rights reserved. the contents of this document are subject to change without notice. customers are advised to consult with sales representative s before ordering. the information, such as descri ptions of function and applicati on circuit examples, in this docum ent are presented solely for t he purpose of reference to show examples of ope rations and uses of fujits u microelectronics device; fujitsu microelectronics does not warrant proper operation of the device with respect to use based on such information. when you develop equipment incor porat- ing the device based on such in formation, you must assume any responsibility arising out of such use of the information. fujitsu microelectronics assumes no liab ility for any damages whatsoever arisi ng out of the use of the information. any information in this document, including descriptions of function and schematic di agrams, shall not be construed as license of the use or exercise of any intellectual property ri ght, such as patent right or copyright, or any other right of fujitsu microelectroni cs or any third party or does fujitsu microel ectronics warrant non-infringeme nt of any third-party's intellectual property right o r other right by using such information. fu jitsu microelectronics assumes no liability for any infringement of the intellectual property rights or other rights of third parties which w ould result from the use of in formation cont ained herein. the products described in this document are designed, developed and manufa ctured as contemplated fo r general use, including wit hout limitation, ordinary indus trial use, general office use, personal use, and household use, but are not designed, developed and m anufactured as contemplated (1) for use acco mpanying fatal risks or dangers th at, unless extremely high safety is secured, could have a ser ious effect to the public, and could lead directly to death, personal injury, severe physical damage or other lo ss (i.e., nuc lear reaction control in nuclear facility, airc raft flight control, air traffic c ontrol, mass transport control, me dical life support system, missile la unch control in weapon system), or (2) for use requiring extremely high re liability (i.e ., submersible repeater and artificial satellite). please note that fujitsu microelectronics will not be liable against you and/or any th ird party for any clai ms or damages arisi ng in connection with above-men tioned uses of the products. any semiconductor devices have an inherent ch ance of failure. you must protect against injury, damage or loss from such failure s by incorporating safety desi gn measures into your facility and equipment such as redundancy, fire protection, and prevention of ov er-current levels and other abnor mal operating conditions. exportation/release of any products described in this docum ent may require necessary procedures in accordance with the regulati ons of the foreign exchange and foreign trade control law of japan and/or us export control laws. the company names and brand na mes herein are the trademarks or registered trademarks of their respective owners. edited strategic business development dept.

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